Attend ACME seminar with guest Sandeep Goel, Oct. 19

About:

Join the ASU Center for Semiconductor Microelectronics, or ACME, for a seminar with Sandeep Kumar Goel, Academician and Senior Director with Taiwan Semiconductor Manufacturing Company, or TSMC. Goel received his M. Tech. degree in VLSI from IIT Delhi in 1999 and his doctorate in electrical and computer engineering from the University of Twente in 2005. He has co-authored two books, three book chapters and published over 100 papers in journals and conference and workshop proceedings. Goel holds more than 100 granted U.S. patents. He was the recipient of the Most Significant Paper Award at the Institute of Electrical and Electronics Engineers, or IEEE, International Test Conference in 2010, and the IEEE Computer Society Distinguished Contributor Award in 2022. He served as the general chair of the 3D Workshop at DATE 2012, the vice-program chair for ITC 2025, and is currently the program chair for ITC 2026. Goel is a Fellow of the IEEE and chairs the IEEE Std. P3537 Standard for 3Dblox: Chiplet connectivity and physical properties description language.

Abstract:

The transition to chiplet-based architectures and multi-die stacking is transforming the semiconductor landscape, offering unprecedented performance and integration. However, as the industry moves from monolithic SoCs to 2.5D/3D advanced packaging, a critical “chiplet gap” has emerged, characterized by complex physical and logical description workflows, disparate design methodologies, and ecosystem fragmentation.

This seminar addresses how the industry is bridging this gap through pioneering standardization. We will explore the latest trends in advanced packaging, including TSMC’s cutting-edge multi-die solutions, and examine the design complexities they introduce. Central to this discussion is the IEEE P3537 working group and its progress on standardizing the 3Dblox language. As a unified framework, 3Dblox is designed to streamline the description of multi-die stacks, enhance interoperability across EDA tools, and lower adoption barriers. Ultimately, this presentation provides a comprehensive perspective on how the standardization of 3Dblox under IEEE P3537 is shaping a scalable, open, and highly collaborative 3D silicon ecosystem.

ACME seminar
Monday, Oct. 19, 2026
9–10 a.m.
Goldwater Center for Science and Engineering (GWC) 487, Tempe campus [map]
Zoom password: 425496